The present invention relates to a semiconductor device, and more particularly, to a capacitor having a reduced voltage dependency.
A driver IC for a CCD or an organic EL display device requires a voltage boosting power supply. Thus, such a driver IC incorporates a voltage boosting power supply circuit such as a DC-DC converter. A capacitor for phase compensation is used in the DC-DC converter. Due to circuitry reasons, the capacitor must have small voltage dependency.
Referring to FIG. 1, a semiconductor device including a prior art capacitor has a first n-well 51 formed in the surface of a p-type silicon substrate 50. A second n-well 52 is formed in the first n-well 51. A gate insulation film 53 and a field insulation film 54, which is adjacent to and surrounds the gate insulation film 53, are formed on the second n-well 52.
A gate electrode 56, which is a conductive body made of a material such as metal or polysilicon, contacts the upper surface of the gate insulation film 53 and part of the upper surface of the field insulation film 54. A p+ type diffusion layer 55 (PDD layer) having a relatively high p-type impurity concentration is formed in the surface of the second n-well 52. The upper surface of the p+ type diffusion layer 55 contacts the gate insulation film 53 and is arranged in alignment with an edge of the field insulation film 54 (i.e., boundary between the gate insulation film 53 and the field insulation film 54).
The gate electrode 56, the gate insulation film 53, and the p+ type insulation layer 55 form a capacitor. The gate electrode 56 and the p+ type diffusion layer 55 function as opposing capacitor electrodes. The gate insulation film 53, which is located between the gate electrode 56 and the p+ type diffusion layer 55, functions as a capacitor insulation film. The p-type impurity concentration of the p+ type diffusion layer 55 may be increased to reduce the voltage dependency (e.g., gate voltage dependency) of the capacitor.
Japanese Laid-Open Patent Publication No. 2000-243979 describes an example of a prior art capacitor.
In a voltage boosting circuit of a DC-DC converter or the like that employs the capacitor of FIG. 1, a high reverse bias voltage (e.g., 12.5 V) is applied to the pn junction between the p+ diffusion layer 55 and the second n-well 52 when the circuit is functioning. When such a reverse bias voltage is applied to the prior art capacitor, which has an insufficient pn junction diode reverse breakdown voltage, an avalanche breakdown may occur at the pn junction. In such a case, the capacitor would not function properly.